RE: STI, HLT in acpi_cpu_idle_c1

From: Matthew Dillon <dillon_at_apollo.backplane.com>
Date: Thu, 17 Jun 2004 16:33:13 -0700 (PDT)
:I only have the emulator on there because of the bug,
:not the other way around :)
:The boards without the emulator are the ones that hang,
:that's why i dragged it out.
:I am definitely generating other interrupts
:(e.g. serial, trying to drop into db, hardclock), but
:all for naught. If I generate an NMI, it hangs
:sending the stop ipi to the other processors, so
:they don't receive that either. The core that i then
:generate shows them in 'hlt'.
:
:I'm wondering about some of the specification updates
:for the Xeon, e.g. P72 of 
:http://developer.intel.com/design/Xeon/specupdt/24967839.pdf
:seems kind of esoteric, but...
:
:--don

    Probably not P72.. that would result in weird, inconsistent panics
    rather then consistent hangs.  To make sure, just cool your cpu down
    a little (open the case and point a big fan at it).  If nothing
    changes then it isn't P72.

    The STI; HLT sequence is definitely working properly... operating 
    systems have depended on that code sequence forever.  Going down
    that path is a red herring.

    If NMI can't stop the other processors w/ IPI STOP then the PC for those
    cpus that you see in the dump is not necessarily going to be where
    they are actually hung.

    It kinda sounds like ACPI has bokered the other cpus.  I'm not sure
    why one would even *want* to use ACPI to idle down Xeon's in an MP
    system, actually :-)

					-Matt
					Matthew Dillon 
					<dillon_at_backplane.com>
Received on Thu Jun 17 2004 - 21:34:10 UTC

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