Re: Potential source of interrupt aliasing

    Hmm.  I can think of two solutions that avoid masking:

    * Change the trigger mode from level to edge as a means of masking the
      interrupt, then change it back to level triggered to unmask.  This
      would be done in the IO APIC.

    * Change the delivery mode to low-priority for the interrupt that occured
      and use the priority field to mask the interrupt to the cpu.  This
      would be done in the IO APIC with the LAPIC's TPR set appropriately.

    These are off-the-cuff ideas.  I don't know how easy or hard it would be
    to implement (yet).  But, certainly, changing the trigger mode can't be
    any more complicated then messing around with the mask.

							-Matt