Re: can someone explain...[ PCI interrupts]

On Thursday 08 December 2005 01:55 pm, Darren Pilgrim wrote:
> From: John Baldwin
>
> > On Wednesday 07 December 2005 06:11 pm, Darren Pilgrim wrote:
> > > What if the APIC was programmed to be edge-triggered just before the
> > > ithread runs and programmed back to level-trigger when the ithread
> > > completes?
> >
> > I'd rather work on my other solution which might be about 5 lines of code
> > rather than screw around with the APICs when that might have other side
> > effects.
>
> My apologies, I didn't intend to come off as dictating design.  I'm
> interested in the subject and it's rare to find people knowledgeable and
> willing to converse about more advanced topics.
>
> Like many others here, I have a very significant investment in hardware to
> which this directly relates.  I wanted to find out about the details of the
> behavior I'm observing and the impact of various solutions as both a
> business man and a student of engineering.

In fairness, Linux does seem to mess with the APICs this way (set to edge when 
an interrupt comes in and then reset it to level) to work around a bug on 
some older I/O APICs.  I'm not sure / can't remember if they do it for all 
PCI interrupts on APICs though.  I need to look at the docs for the PXH 
bridges in question again, but I think that when it does the legacy INTx 
thing it is swizzling the interrupts to the bridge's INTx pins using the 
standard PCI-PCI swizzle, in which case patching around the routing is a 
simple patch of changing the $PIR and MPTable drivers to ignore such bridges 
based on the devid, and changing the ACPI PCI-PCI bridge driver to ignore the 
_PRT for such bridges.  Fortunately, one of my recently added test machines 
reproduces the problem so I can test this idea and give people a patch that 
at least somewhat works for further testing.  Maybe in a day or so.

-- 
John Baldwin <jhb_at_FreeBSD.org>  <><  http://www.FreeBSD.org/~jhb/
"Power Users Use the Power to Serve"  =  http://www.FreeBSD.org