Re: Page table walk on TLB miss

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On 14 Dec 2006, at 19:30, Martin Cracauer wrote:

> Can somebody explain how the MMU walks the page table in RAM when
> there is a TLB miss and where the FreeBSD code is that sets up the
> tables?
>
> Is there actual OS code involved in the walking or does the OS just
> set up the code and the MMU walks on it's own?
>
> Mostly interested in AMD64.
>
>
In case of i386/amd64 the mmu walks the pagetables on it's on  
(hardware page table walk).
The walking is done with physical addresses starting at the physical  
address stored in the cr3 register of the cpu.

Yes other cpus do this completely different UltraSPARC eg has a  
Software Table walk the cpu traps simply on aTSB miss
and the rest is up to the OS.

- --

Viele Grüße,
Lars Heidieker

lars_at_heidieker.de
http://paradoxon.info

- ------------------------------------

Mystische Erklärungen.
Die mystischen Erklärungen gelten für tief;
die Wahrheit ist, dass sie noch nicht einmal oberflächlich sind.
      -- Friedrich Nietzsche



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