ag> Let's say it takes 1000 cycles to issue a memory load ag> because of a cache miss, and 1 cycle to increment ag> something already in a register. Let's also say that ag> your program does each operation the same number of times. ag> Does the 'instructions' count each operation identically so ag> both operations appear to cost the same, or is it sampled ag> from some clock interrupt, so that the memory load ag> (correctly) shows up 1000 times more often? 'instructions' is a convenience alias for closest underlying PMC event that counts retired instructions. Take a look at pmc(3), section "Event Name Aliases". I could add an alias 'unhalted-cycles' that maps to: AMD K8 -- "k8-bu-cpu-clk-unhalted" INTEL P6 -- "p6-cpu-clk-unhalted" INTEL PIV -- "p4-global-power-events" perhaps. I need to check the manual again. (The AMD K7 lacks a suitable event). -- FreeBSD Volunteer, http://people.freebsd.org/~jkoshyReceived on Fri Feb 24 2006 - 00:31:38 UTC
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