On Sunday 23 July 2006 20:03, Sten Daniel Sørsdal wrote: > sthaug_at_nethelp.no wrote: > >>> One approach that we could use for 64-bit counters would be to just > >>> use 32-bits one, and poll them for overflow and bump an overflow > >>> count. This assumes that the 32-bit counters overflow much less often > >>> than the polling interval, and easily triples the amount of storage > >>> for each of them... It is ugly :-( > >>> > >> What's wrong with the add+adc (asm) approach found on any i386? > > > > Presumably the fact that add + adc isn't an atomic operation. So if > > you want to guarantee 64 bit consistency, you need locking or similar. > > > > Would it not be necessary to do this locking anyway? > I don't see how polling for overflow would help this consistency. > Are both suggestions insufficient? I actually think that add + adc is ok for the case of incrementing simple counters. You can even do 'inc ; addc $0' -- John BaldwinReceived on Mon Jul 24 2006 - 19:28:55 UTC
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