Re: Freeze due to performance_cx_lowest=LOW

From: Joseph Koshy <joseph.koshy_at_gmail.com>
Date: Fri, 16 Jun 2006 18:50:46 +0530
kb> It seems that at least hwpmc(4) depends on APIC for full
kb> functionality.

PMC interrupts get routed through the processor's local APIC.
Without a functional LAPIC, hwpmc only offers counting modes
of operation.

-- 
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Received on Sat Jun 17 2006 - 03:16:00 UTC

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