In message: <20070617071303.GG12027_at_obelix.dsto.defence.gov.au> "Wilkinson, Alex" <alex.wilkinson_at_dsto.defence.gov.au> writes: : 0n Sat, Jun 16, 2007 at 11:56:59PM -0600, M. Warner Losh wrote: : : >Yes. I'm pretty sure that's wrong. All ISA and PC Card devices use : >edge triggered interrupts. Also, it is inefficient for level : >triggered interrupts, since two interrupt sources on the same : >interrupt may trigger at about the same time... : : What is meant by "edge triggered interrupts" ? An edge triggered interrupt causes the PIC to signal the CPU when there's a change in level of the interrupt line. ISA signals this way, where IRQs are normally high and the card forces them low and the bus termination pulls them back up high. This is in contrast to level triggered interrupts which are considered active the entire time they are asserted. WarnerReceived on Sun Jun 24 2007 - 01:31:09 UTC
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