Do you know why NX is disabled on this processor? If possible, could you re-enable it and vm.pmap.pg_ps_enabled, and see if you still have the same problem. On Wed, Feb 11, 2009 at 5:26 PM, Mark Atkinson <atkin901_at_yahoo.com> wrote: > Alan Cox wrote: > > > On Tue, Feb 10, 2009 at 2:20 PM, Mark Atkinson <atkin901_at_yahoo.com> > wrote: > > [snip] > >> > >> > >> > >> Well, taking the information I knew -- OCT 15th == good, Mid DEC == BAD, > >> I trolled every commit logged between. Eventually I found this one: > >> > >> http://svn.freebsd.org/viewvc/base?view=revision&revision=185715 > >> > >> http://docs.freebsd.org/cgi/mid.cgi?200812061937.mB6JbqAI003273 > >> > >> I set vm.pmap.pg_ps_enabled="0" in /boot/loader.conf, and > >> was able to complete buildworld and -j16 buildworld and -j8 buildkernel > >> no problem. > >> > >> It appears superpage mapping causes alignment problems on this box. > > > > > > Can you please provide more detailed information about this machine, in > > particular, the processor including the revision? It would also be > > helpful to see what gdb says about a couple of these crashes, > > specifically, the machine registers at the time of the exception. > > Is there something specifically preventing cores during buildworld? I > can't > find one after a bus error. I'll try to find something to dump the > revision for me. Here's the verbose boot for the processor. > > CPU: Quad-Core AMD Opteron(tm) Processor 2352 (2100.09-MHz K8-class CPU) > Origin = "AuthenticAMD" Id = 0x100f23 Stepping = 3 > > > Features=0x178bfbff<FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CLFLUSH,MMX,FXSR,SSE,SSE2,HTT> > Features2=0x802009<SSE3,MON,CX16,POPCNT> > AMD Features=0xee400800<SYSCALL,MMX+,FFXSR,Page1GB,RDTSCP,LM,3DNow > +,3DNow!> > AMD > Features2=0x7ff<LAHF,CMP,SVM,ExtAPIC,CR8,ABM,SSE4A,MAS,Prefetch,OSVW,IBS> > TSC: P-state invariant > Cores per package: 4 > L1 2MB data TLB: 48 entries, fully associative > L1 2MB instruction TLB: 16 entries, fully associative > L1 4KB data TLB: 48 entries, fully associative > L1 4KB instruction TLB: 32 entries, fully associative > L1 data cache: 64 kbytes, 64 bytes/line, 1 lines/tag, 2-way associative > L1 instruction cache: 64 kbytes, 64 bytes/line, 1 lines/tag, 2-way > associative > L2 2MB data TLB: 128 entries, 2-way associative > L2 2MB instruction TLB: 0 entries, 2-way associative > L2 4KB data TLB: 512 entries, 4-way associative > L2 4KB instruction TLB: 512 entries, 4-way associative > L2 unified cache: 512 kbytes, 64 bytes/line, 1 lines/tag, 16-way > associative > usable memory = 10720198656 (10223 MB) > Physical memory chunk(s): > 0x0000000000001000 - 0x000000000009bfff, 634880 bytes (155 pages) > 0x0000000000f55000 - 0x00000000cfe4dfff, 3471806464 bytes (847609 pages) > 0x00000000cfe56000 - 0x00000000cfe56fff, 4096 bytes (1 pages) > 0x0000000100000000 - 0x000000029d212fff, 6931165184 bytes (1692179 pages) > > > -- > Mark Atkinson > atkin901_at_yahoo.com > (!wired)?(coffee++):(wired); > > _______________________________________________ > freebsd-current_at_freebsd.org mailing list > http://lists.freebsd.org/mailman/listinfo/freebsd-current > To unsubscribe, send any mail to "freebsd-current-unsubscribe_at_freebsd.org" >Received on Thu Feb 12 2009 - 08:21:08 UTC
This archive was generated by hypermail 2.4.0 : Wed May 19 2021 - 11:39:42 UTC