Adrian Chadd wrote: > 2009/11/5 Mark Atkinson <atkin901_at_yahoo.com>: > >> I'll answer my own question, no: >> >> http://support.amd.com/us/Processor_TechDocs/25481.pdf >> >> Although the some of the posts in >> >> http://bugzilla.kernel.org/show_bug.cgi?id=11305 >> >> indicate any model < 0x40. Someone must have actually narrowed the range. > > Is there a FreeBSD PR or errata URL which can be linked to instead, > complete with copies of the above in it? If you read the mysql related blog post on it: http://timetobleed.com/mysql-doesnt-always-suck-this-time-its-amd/ Someone in the comments suggests this is AMD errata 147 and quotes the text. I'll include a copy of the comment here below for the mail archives (and since urls tend to disappear). # silverjam The kernel bug: http://bugzilla.kernel.org/show_bug.cgi?id=11305 Which references an AMD "errata 147" from "Revision Guide for AMD Athlon™ 64 and AMD Opteron™ Processors." http://support.amd.com/us/Processor_TechDocs/25759.pdf Which says: """ Potential Violation of Read Ordering Rules Between Semaphore Operations and Unlocked Read-Modify-Write Instructions Description Under a highly specific set of internal timing circumstances, the memory read ordering between a semaphore operation and a subsequent read-modify-write instruction (an instruction that uses the same memory location as both a source and destination) may be incorrect and allow the read-modifywrite instruction to operate on the memory location ahead of the completion of the semaphore operation. The erratum will not occur if there is a LOCK prefix on the read-modify-write instruction. This erratum does not apply if the read-only value in MSRC001_1023h[33] is 1b. Potential Effect on System In the unlikely event that the condition described above occurs, the read-modify-write instruction (in the critical section) may operate on data that existed prior to the semaphore operation. This erratum can only occur in multiprocessor or multicore configurations. Suggested Workaround To provide a workaround for this unlikely event, software can perform any of the following actions for multiprocessor or multicore systems: • Place a LFENCE instruction between the semaphore operation and any subsequent read-modifywrite instruction(s) in the critical section. • Use a LOCK prefix with the read-modify-write instruction. • Decompose the read-modify-write instruction into separate instructions. No workaround is necessary if software checks that MSRC001_1023h[33] is set on all processors that may execute the code. The value in MSRC001_1023h[33] may not be the same on all processors in a multi-processor system. Fix Planned: Yes """Received on Thu Nov 05 2009 - 16:43:26 UTC
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