On Sun, Jun 13, 2010 at 11:37:23PM +0900, Norikatsu Shigemura wrote: > Hi yongari! > > I have a OpenRD Ultimate, which has two GbE ports - if_mge(4). But > I couldn't use mge1 like following. So I tried to investigate. > > - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - > Jun 13 05:02:14 sidearms kernel: mge1: watchdog timeout > Jun 13 05:02:14 sidearms kernel: mge1: Timeout on link-up ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ This part looks like a bug in mge(4). Driver does not know how long it would take to get a valid link. Waiting for valid link in driver initialization does not work(e.g Starting controller without UTP cable may always fail on mge(4)). I think mge(4) should implement correct link state change handling. > - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - > > I found a initialize issue in e1000phy.c. > - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - > --- sys/dev/mii/e1000phy.c.orig 2010-05-01 10:17:15.282196000 +0900 > +++ sys/dev/mii/e1000phy.c 2010-06-13 16:19:46.616650536 +0900 > _at__at_ -278,6 +278,7 _at__at_ > case MII_MODEL_MARVELL_E1118: > break; > case MII_MODEL_MARVELL_E1116: > + case MII_MODEL_MARVELL_E1149: > page = PHY_READ(sc, E1000_EADR); > /* Select page 3, LED control register. */ > PHY_WRITE(sc, E1000_EADR, 3); > - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - > > I confirmed OK on my environment, OpenRD Ultimate has a 88E1121(I > saw it, physically): Once it was there but I removed it due to some other issues seen on Yukon Ultra. That part will program LED access so I guess it wouldn't affect normal network activity. > - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - > Jun 13 15:20:01 sidearms kernel: miibus0: miibus_probe: ma.mii_id1 = 0x141, ma.mii_id2 = 0xcb3 > - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - > And I confirmed that MII chipset ID is same as 88E1249. > - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - > mge0 > Marvell OBIO Memory: > 4043776000-4043784191 > Marvell OBIO IRQ: > 11 > 12 > 13 > 14 > 46 > miibus0 > e1000phy0 pnpinfo oui=0x5043 model=0xb rev=0x3 at phyno=0 > mge1 > Marvell OBIO Memory: > 4043792384-4043800575 > Marvell OBIO IRQ: > 15 > 16 > 17 > 18 > 47 > miibus1 > e1000phy1 pnpinfo oui=0x5043 model=0xb rev=0x3 at phyno=1 > - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - > > > BTW, I knew same issue on OpenRD Client, it has a 88E1116R, maybe. > Sorry, I don't already have it. I couldn't confirm. > So accordingly my memo: > - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - > miibus0: ma.mii_id1 = 0x141, ma.mii_id2 = 0xe40 > - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - > I found many initialize issues on 88E1116R by not existing on > e1000phy.c. Maybe 88E1116 = 88E1116R like following: > - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - > switch (esc->mii_model) { > case MII_MODEL_MARVELL_E1111: > case MII_MODEL_MARVELL_E1112: > case MII_MODEL_MARVELL_E1116: > + case MII_MODEL_MARVELL_E1116R: > case MII_MODEL_MARVELL_E1118: > case MII_MODEL_MARVELL_E1149: > case MII_MODEL_MARVELL_PHYG65G: > - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - > But there are many points, I don't know that this modify is right. > 88E1116R might be RGMII variant of 88E1116. Because I don't have controller that has 88E1116R I didn't treat it as 88E1116. With that change could you use straight cable without help of MDI/MDI-X converter?Received on Tue Jun 15 2010 - 16:10:07 UTC
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