Re: new cpuid bits

From: Gary Jennejohn <gljennjohn_at_googlemail.com>
Date: Fri, 19 Nov 2010 17:21:20 +0100
On Fri, 19 Nov 2010 17:39:53 +0200
Andriy Gapon <avg_at_freebsd.org> wrote:

> 
> Guys,
> 
> I would like to add definitions for couple more useful CPUID bits, but I am
> greatly confused about how to name them.
> I failed to deduce the naming convention from the existing definitions and I am
> not sure how to make the names proper and descriptive.
> 
> The bits in question are returned by CPUID.6 in EAX and ECX.
> CPUID.6 block is described by both AMD and Intel as "Thermal and Power Management
> (Leaf)".  Bits in EAX are defined only for Intel at present, the bit in ECX is
> defined for both.
> 
> Description/naming of the bits from the specifications:
> EAX[0]: Digital temperature sensor is supported if set
> EAX[1]: Intel Turbo Boost Technology Available
> EAX[2]: ARAT. APIC-Timer-always-running feature is supported if set.
> ECX[0]:
>   Intel: Hardware Coordination Feedback Capability (Presence of Bits MCNT and ACNT
> MSRs).
>   AMD:  EffFreq: effective frequency interface.
> 
> How does the following look to you?
> I will appreciate suggestions/comments.
> Thanks!
> 
> Index: sys/amd64/include/specialreg.h
> ===================================================================
> --- sys/amd64/include/specialreg.h	(revision 215524)
> +++ sys/amd64/include/specialreg.h	(working copy)
> _at__at_ -136,6 +136,15 _at__at_
>  #define	CPUID2_AESNI	0x02000000
> 
>  /*
> + * Important bits in the Thermal and Power Management flags
> + * CPUID.6 EAX and ECX.
> + */
> +#define	CPUTPM1_SENSOR	0x00000001
> +#define	CPUTPM1_TURBO	0x00000002
> +#define	CPUTPM1_ARAT	0x00000004
> +#define	CPUTPM2_EFFREQ	0x00000001
> +
> +/*
>   * Important bits in the AMD extended cpuid flags
>   */
>  #define	AMDID_SYSCALL	0x00000800
> 

Maybe add a comment in which register the bits are to be found, like in the text?

-- 
Gary Jennejohn
Received on Fri Nov 19 2010 - 15:21:25 UTC

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