On Thursday 07 April 2011 01:12 pm, Andriy Gapon wrote: > Guys, > > what do you think about the following change? > The idea is mark TSC as the best timecounter when it's invariant > and synchronized between cores. Unfortunately I don't have code to > auto-detect the synchronization and keep relying on the > corresponding tunable. I know Intel is claiming that TSCs for all cores/packages reset to zero when they receive a "synchronous" INIT/RESET IPI. I haven't really verified their claim but I think it may be good enough for our AP startup code. However, AMD processors never had such guarantee, AFAIK. > I thought about auto-setting it for single-package configurations, > but even that information is currently not trivial to get out of our > mp (i386/amd64) machdep code. It isn't easy ATM. :-/ > --- a/sys/x86/x86/tsc.c > +++ b/sys/x86/x86/tsc.c > _at__at_ -169,6 +169,9 _at__at_ init_TSC_tc(void) > printf("TSC timecounter disabled: APM enabled.\n"); > } > > + if (tsc_is_invariant) > + tsc_timecounter.tc_quality = 1200; > + > #ifdef SMP > /* > * We can not use the TSC in SMP mode unless the TSCs on all CPUs Although it looks okay, please don't commit it just yet. I am working in this area actively. Also, if the Intel's claim is true, i.e., TSCs reset to zero when APs start, we cannot use TSC as a timecounter hardware until all APs are started properly. Thanks, Jung-uk KimReceived on Thu Apr 07 2011 - 18:00:32 UTC
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