Hi, > Maybe this is a problem caused by a misdetected clock source? I've had > this problem as well. I've appended the patch I've been using to fix this problem on this Intel Core2Duo T6570 processor. There are some model IDs hardcoded in the TSC detection code that enable TSC even though it's not invariant here (no TSC_INVARIANT bit set on the CPU). There is some quirk code further down that disables TSC once again, but it only works for processors that have C3 power states (the T6570 doesn't). I don't think any of this model checking code is necessary, but maybe I'm wrong. Cheers, Jan
This archive was generated by hypermail 2.4.0 : Wed May 19 2021 - 11:40:51 UTC