Re: [PATCH] XOR uses

Marcelo Araujo wrote:
> What would be the advantage of it?

Just clarity and readability.

> I still prefer explicit than implicit. The current code is much more
> readable.

I very much disagree. XOR is a basic binary operation, like AND and OR.
I don't understand what's more explicit about using 4x the code to
reimplement it every time. I don't feel strongly about the patches fate,
though.

> 2015-12-08 11:13 GMT+08:00 Michael McConville <mmcco_at_mykolab.com>:
> 
> > A minor simplification patch:
> >
> >
> > Index: sys/arm/allwinner/a10_gpio.c
> > ===================================================================
> > --- sys/arm/allwinner/a10_gpio.c        (revision 291978)
> > +++ sys/arm/allwinner/a10_gpio.c        (working copy)
> > _at__at_ -356,10 +356,7 _at__at_
> >         sc = device_get_softc(dev);
> >         A10_GPIO_LOCK(sc);
> >         data = A10_GPIO_READ(sc, A10_GPIO_GP_DAT(bank));
> > -       if (data & (1 << pin))
> > -               data &= ~(1 << pin);
> > -       else
> > -               data |= (1 << pin);
> > +       data ^= (1 << pin);
> >         A10_GPIO_WRITE(sc, A10_GPIO_GP_DAT(bank), data);
> >         A10_GPIO_UNLOCK(sc);
> >
> > Index: sys/arm/altera/socfpga/socfpga_gpio.c
> > ===================================================================
> > --- sys/arm/altera/socfpga/socfpga_gpio.c       (revision 291978)
> > +++ sys/arm/altera/socfpga/socfpga_gpio.c       (working copy)
> > _at__at_ -336,10 +336,7 _at__at_
> >
> >         GPIO_LOCK(sc);
> >         reg = READ4(sc, GPIO_SWPORTA_DR);
> > -       if (reg & (1 << i))
> > -               reg &= ~(1 << i);
> > -       else
> > -               reg |= (1 << i);
> > +       reg ^= (1 << i);
> >         WRITE4(sc, GPIO_SWPORTA_DR, reg);
> >         GPIO_UNLOCK(sc);
> >
> > Index: sys/arm/rockchip/rk30xx_gpio.c
> > ===================================================================
> > --- sys/arm/rockchip/rk30xx_gpio.c      (revision 291978)
> > +++ sys/arm/rockchip/rk30xx_gpio.c      (working copy)
> > _at__at_ -375,10 +375,7 _at__at_
> >                 return (EINVAL);
> >         RK30_GPIO_LOCK(sc);
> >         data = RK30_GPIO_READ(sc, RK30_GPIO_SWPORT_DR);
> > -       if (data & (1U << pin))
> > -               data &= ~(1U << pin);
> > -       else
> > -               data |= (1U << pin);
> > +       data ^= (1U << pin);
> >         RK30_GPIO_WRITE(sc, RK30_GPIO_SWPORT_DR, data);
> >         RK30_GPIO_UNLOCK(sc);
> >
> > Index: sys/arm/samsung/exynos/exynos5_pad.c
> > ===================================================================
> > --- sys/arm/samsung/exynos/exynos5_pad.c        (revision 291978)
> > +++ sys/arm/samsung/exynos/exynos5_pad.c        (working copy)
> > _at__at_ -722,10 +722,7 _at__at_
> >
> >         GPIO_LOCK(sc);
> >         reg = READ4(sc, bank.port, bank.con + 0x4);
> > -       if (reg & (1 << pin_shift))
> > -               reg &= ~(1 << pin_shift);
> > -       else
> > -               reg |= (1 << pin_shift);
> > +       reg ^= (1 << pin_shift);
> >         WRITE4(sc, bank.port, bank.con + 0x4, reg);
> >         GPIO_UNLOCK(sc);
> >
> > Index: sys/dev/nand/nandsim_ctrl.c
> > ===================================================================
> > --- sys/dev/nand/nandsim_ctrl.c (revision 291978)
> > +++ sys/dev/nand/nandsim_ctrl.c (working copy)
> > _at__at_ -388,9 +388,6 _at__at_
> >         rand = random();
> >         if ((rand % 1000000) < chip->error_ratio) {
> >                 bit = rand % 8;
> > -               if (*byte & (1 << bit))
> > -                       *byte &= ~(1 << bit);
> > -               else
> > -                       *byte |= (1 << bit);
> > +               *byte ^= (1 << bit);
> >         }
> >  }