Re: Need help with New Build -- Skylake

From: Konstantin Belousov <kostikbel_at_gmail.com>
Date: Thu, 24 Dec 2015 20:13:08 +0200
On Thu, Dec 24, 2015 at 08:29:20AM -0700, Ian Lepore wrote:
> We had exactly this symptom -- long delay with spincursor before
> loading the kernel -- on arm systems when we first enabled forth in
> loader.  The problem turned out to be the fact that loader was running
> with instruction and data caches disabled, and it took about 90-100
> seconds to parse the 547 lines of text (almost all useless) in
> /boot/defaults/loader.conf.  We stripped that file down to the dozen or
> so lines that actually needed to be there and booting became much
> faster.  Eventually we got the caches enabled in the prior-stage
> bootloader and it became really fast.

It is highly unlikely that caches are the source of the slowness. On
x86, we rely on the firmware (BIOS or EFI) to properly configure both
DRAM controllers and caches. More, Intel considers the corresponding
controllers configuration recipes as highly secret and, even for BIOS
vendors, Intel provides the binary blob of code which does the config
magic, instead of the documentation.

That said, loader runs in the unpaged protected mode but reflects BIOS
calls into the real mode. Quite possible, either the real mode is
slow on SkyLakes, or even more possible, the switch between real and
protected mode is slow, or the protected mode without paging enabled is
slow. Or might be the PCH lacks the ISA timer.

A developer needs the real machine to diagnose the cause.
Received on Thu Dec 24 2015 - 17:13:14 UTC

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