Re: Haswell CPU Feature

From: Sean Bruno <sbruno_at_ignoranthack.me>
Date: Thu, 08 Jan 2015 09:51:20 -0700
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On 01/06/15 07:48, John Baldwin wrote:
> On 1/6/15 12:44 AM, Jia-Shiun Li wrote:
>> On Tue, Jan 6, 2015 at 1:23 PM, Neel Natu <neelnatu_at_gmail.com>
>> wrote:
>> 
>>> Hi Sean,
>>> 
>>> On Mon, Jan 5, 2015 at 6:34 PM, Sean Bruno
>>> <sbruno_at_ignoranthack.me> wrote:
>>>> I'm thinking something like this:
>>>> 
>>>> Index: sys/x86/x86/identcpu.c 
>>>> ===================================================================
>>>>
>>>> 
- - --- sys/x86/x86/identcpu.c    (revision 276729)
>>>> +++ sys/x86/x86/identcpu.c      (working copy) _at__at_ -781,7
>>>> +781,7 _at__at_ "\011TM2"       /* Thermal Monitor 2 */ "\012SSSE3"
>>>> /* SSSE3 */ "\013CNXT-ID"   /* L1 context ID
>>> available */
>>>> - -                             "\014<b11>" +
>>>> "\014SDBG"      /* IA32_DEBUG_INTERFACE
>>> debug*/
>>>> "\015FMA"       /* Fused Multiply Add */ "\016CX16"      /*
>>>> CMPXCHG16B
>>> Instruction */
>>>> "\017xTPR"      /* Send Task Priority
>>> Messages*/
>>>> 
>>>> 
>>> 
>>> Looks good.
>>> 
>> 
>> Maybe also this for completeness?
>> 
>> # svnlite diff Index: sys/x86/include/specialreg.h 
>> ===================================================================
>>
>> 
- --- sys/x86/include/specialreg.h        (revision 276737)
>> +++ sys/x86/include/specialreg.h        (working copy) _at__at_ -154,6
>> +154,7 _at__at_ #define        CPUID2_TM2      0x00000100 #define
>> CPUID2_SSSE3    0x00000200 #define        CPUID2_CNXTID
>> 0x00000400 +#define        CPUID2_SDBG     0x00000800 #define
>> CPUID2_FMA      0x00001000 #define        CPUID2_CX16
>> 0x00002000 #define        CPUID2_XTPR     0x00004000
> 
> Yes, please include both.  SDBG matches the label in the Intel SDM,
> so that's the preferred name.
> 


Thanks folks, I've committed all of this to head after a quick
download and read of the SDM.

sean
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Received on Thu Jan 08 2015 - 15:51:24 UTC

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