On 23-12-2016 22:07, Slawa Olhovchenkov wrote: > On Fri, Dec 23, 2016 at 09:37:40PM +0100, Willem Jan Withagen wrote: > >> On 23-12-2016 20:30, Slawa Olhovchenkov wrote: >>> On Fri, Dec 23, 2016 at 08:16:39PM +0100, Willem Jan Withagen wrote: >>> >>>> On 23-12-2016 14:26, Slawa Olhovchenkov wrote: >>>>> On Thu, Dec 22, 2016 at 09:26:02PM +0100, Willem Jan Withagen wrote: >>>>> >>>>>> On 16-12-2016 00:57, Adrian Chadd wrote: >>>>>>> heh, an updated BIOS that solves the problem will solve the problem. :) >>>>>>> >>>>>>> I think you have enough information to provide to supermicro. Ie, >>>>>>> "SMAP says X, when physical memory pages at addresses X are accessed, >>>>>>> they don't behave like memory, maybe something is wrong". >>>>>>> >>>>>>> All I can think of is some hack to add a blacklist for that region so >>>>>>> you can boot the unit. But it makes me wonder what else is going on. >>>>>> >>>>>> I have an X10DRL-iT with 256Gb and 2* 2630V4 available for testing until >>>>>> begin January. Started it on 11-RELEASE and upgraded to 12-CURRENT of >>>>>> 20-12-2016. >>>>>> Boots just fine, and seems to run OKE. >>>>>> >>>>>> If anything useful to test, just let me know. >>>>> >>>>> For touch issuse you must enable in BIOS both NUMA and Memory >>>>> Interleave below 4G. >>>> >>>> Numa was already on, but I cannot find the Memory Interleave option. >>> >>> for X10DRi: >>> >>> Advanced/Chipset Config/North Bridge/Memory Config/Socket Interleave below 4G >> >> The only thing that could be this is: >> a7 mode, >> but that is already enabled. >> This speaks about a bit higher memory bandwidth. > > In may case A7 immediately below 'Socket Interleave below 4G' Right, then I do not have this option. Sorry, --WjWReceived on Fri Dec 23 2016 - 20:12:49 UTC
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