Re: TSC as timecounter makes system lag

Sorry just saw this. Bad Gmail.


On Fri, Jan 13, 2017 at 8:05 PM, Konstantin Belousov <kostikbel_at_gmail.com>
wrote:

> On Fri, Jan 13, 2017 at 08:26:04AM +0800, Jia-Shiun Li wrote:
> > Hi all,
> >
> > since 2 or 3 weeks ago, I noticed that my old Penryn-based Intel Pentium
> > T4200 notebook lagged a lot. System time was running a lot slower,
> > sometimes even looked like it freezed. Keystroke repeat rate was slow
> too.
> >
> > Since system time is slow, I tried to change timecounter from default TSC
> > to HPET. And it resumed normal immediately.
> Please show the output of sysctl kern.timecounter and kern.eventtimer.
> I suspect that you changed eventtimer and not timecounter.
>

Files attached. I changed it by "sysctl kern.timecounter.hardware=HPET"


> The same world binary works fine on other Ivybridge and Haswell desktops,
> > so I assume this may be related to CPU or mainboard generations.
> >
> > version is
> >
> > FreeBSD jsli-nb 12.0-CURRENT FreeBSD 12.0-CURRENT #0 r311687: Mon Jan  9
> > 04:07:27 CST 2017
> > jsli_at_4cbsd:/personal/freebsd/obj/x64/personal/freebsd/
> fbsdsrc/sys/MINIMAL-NODEBUG
> > amd64
> >
> > and CPU is
> >
> > CPU: Pentium(R) Dual-Core CPU       T4200  _at_ 2.00GHz (1995.04-MHz
> K8-class
> > CPU)
> >   Origin="GenuineIntel"  Id=0x1067a  Family=0x6  Model=0x17  Stepping=10
> >
> > Features=0xbfebfbff<FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,
> APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CLFLUSH,DTS,ACPI,
> MMX,FXSR,SSE,SSE2,SS,HTT,TM,PBE>
> >
> > Features2=0xc00e39d<SSE3,DTES64,MON,DS_CPL,EST,TM2,
> SSSE3,CX16,xTPR,PDCM,XSAVE,OSXSAVE>
> >   AMD Features=0x20100800<SYSCALL,NX,LM>
> >   AMD Features2=0x1<LAHF>
> >   TSC: P-state invariant, performance statistics
> >
> > Tested similar OS rev on another Intel Core 2 Duo E7400 Wolfdale (the
> same
> > generation as the Pentium T4200). The same lag also happens on it.
> >
> > BTW on both system, cpuX:timer interrupts do not fire at all and count
> > remains 0.
> It is known that LAPIC is shut down in C2 and deeper CPU sleep states on
> Core2.  FreeBSD 11 (and HEAD) started using MWAIT and requesting deep
> wait states from BIOS.  If the configuration uses LAPIC and deep sleeps
> are enabled, eventtimers do not work reliably.
>

> Default configuration should strongly prefer HPET eventtimer over LAPIC for
> machines which do not have LAPIC armed in Cx states, see r309189.  If you
> do not have any customizations of eventtimer selection, then please provide
> verbose dmesg from your boot.
>
> If you prefer to not use deep Cx and MWAIT, set loader tunable
> debug.acpi.disabled to include word "mwait", see acpi(4).  You can check
> that this worked by looking at sysctl dev.cpu.N output.
>

Thanks for the explanation. Looks eventtimer favored HPET over LAPIC
like you described on this notebook.

-Jia-Shiun.