hwpmc and Xeon E5 v4

From: Andriy Gapon <avg_at_FreeBSD.org>
Date: Thu, 15 Jun 2017 10:44:05 +0300
It seems that hwpmc does not support newer Xeon processors:
  pmc: Unknown Intel CPU.

This is how FreeBSD reports a processor from Xeon E5 v4 line:
CPU: Intel(R) Xeon(R) CPU E5-2620 v4 _at_ 2.10GHz (2095.20-MHz K8-class CPU)
  Origin="GenuineIntel"  Id=0x406f1  Family=0x6  Model=0x4f  Stepping=1
Features=0xbfebfbff<FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CLFLUSH,DTS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,PBE>
Features2=0x7ffefbff<SSE3,PCLMULQDQ,DTES64,MON,DS_CPL,VMX,SMX,EST,TM2,SSSE3,SDBG,FMA,CX16,xTPR,PDCM,PCID,DCA,SSE4.1,SSE4.2,x2APIC,MOVBE,POPCNT,TSCDLT,AESNI,XSAVE,OSXSAVE,AVX,F16C,RDRAND>
  AMD Features=0x2c100800<SYSCALL,NX,Page1GB,RDTSCP,LM>
  AMD Features2=0x121<LAHF,ABM,Prefetch>
  Structured Extended
Features=0x21cbfbb<FSGSBASE,TSCADJ,BMI1,HLE,AVX2,SMEP,BMI2,ERMS,INVPCID,RTM,PQM,NFPUSG,PQE,RDSEED,ADX,SMAP,PROCTRACE>
  XSAVE Features=0x1<XSAVEOPT>
  VT-x: PAT,HLT,MTF,PAUSE,EPT,UG,VPID,VID,PostIntr
  TSC: P-state invariant, performance statistics

I think that this processor belongs to Broadwell-EP family:
http://www.cpu-world.com/CPUs/Xeon/Intel-Xeon%20E5-2620%20v4.html

>From my reading of the code it seems that 0xf1 case needs to be added to the big
switch statement on the CPU model number.
But I am not sure if / how the processor is compatible which the previous
models.  Would it suffice to treat that CPU as PMC_CPU_INTEL_BROADWELL_XEON?
Or would something more elaborate be required?

I would appreciate any help, patches, suggestions, documentation links, etc.
Thank you.

-- 
Andriy Gapon
Received on Thu Jun 15 2017 - 05:45:35 UTC

This archive was generated by hypermail 2.4.0 : Wed May 19 2021 - 11:41:12 UTC