JB> Ohhhh, this is a different issue. Sorry. As a hack, try changing JB> 'FIRST_MSI_INT' to 512 in sys/amd64/include/intr_machdep.h. The issue JB> is that some systems now include more than 256 interrupt pins on I/O JB> APICs, so IRQ 256 is already reserved for use by one of those JB> interrupt pins. The real fix is that I need to make FIRST_MSI_INT JB> dynamic instead of a constant and just define it as the first free IRQ JB> after the I/O APICs have probed. JB> Yep. That it. But just one note irq585: ccp14:721 _at_cpu0(domain0): 0 irq586: ccp14:723 _at_cpu0(domain0): 0 irq587: ccp15:725 _at_cpu0(domain0): 0 If I understand correctly number of irq's even more then 512, so better to change to real number in system ? Or this is another case ? Any way thank you for help. Now I can use system with msix and msi enabled.Received on Wed Apr 18 2018 - 17:13:15 UTC
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