Re: Re: Twin CPU machine running with only one cpu?

From: Brendon and Wendy <wendy.humphrey_at_comcast.net>
Date: Tue, 10 Jun 2003 17:29:08 -0700
All,

Some progress to report - ran top -S as suggested, and could see the two idle 
threads, one per physical CPU. The second idle thread was halted but on cpu 
#1 (the second cpu).

sysctl machdep.halt_logical_cpus=0. Both CPU threads are active, occupying 
~100% of thier respective cpus. Run my infinite loop program. Occupies 100% 
of cpu #1, system load 50%. Start second instance, occupies 100% of cpu 0. 
Good! Its working.

Conclusion in my case setting sysctl machdep.halt_logical_cpus=1 effectively 
halts my second CPU. Maybe it thought it was a second core in the first CPU?

For Doug, thanks for the suggestions. Flashed the BIOS with no effect. Mptable 
attached.

I'm happy to test any patches arising from this...

Cheers All.
Brendon



===============================================================================

MPTable, version 2.0.15

-------------------------------------------------------------------------------

MP Floating Pointer Structure:

  location:			BIOS
  physical address:		0x000f4f90
  signature:			'_MP_'
  length:			16 bytes
  version:			1.4
  checksum:			0x7d
  mode:				Virtual Wire

-------------------------------------------------------------------------------

MP Config Table Header:

  physical address:		0x000f1400
  signature:			'PCMP'
  base table length:		316
  version:			1.4
  checksum:			0x77
  OEM ID:			'OEM00000'
  Product ID:			'PROD00000000'
  OEM table pointer:		0x00000000
  OEM table size:		0
  entry count:			31
  local APIC address:		0xfee00000
  extended table length:	0
  extended table checksum:	0

-------------------------------------------------------------------------------

MP Config Base Table Entries:

--
Processors:	APIC ID	Version	State		Family	Model	Step	Flags
		 0	 0x11	 BSP, usable	 15	 2	 4	 0xfbff
		 1	 0x11	 AP, usable	 15	 2	 4	 0xfbff
--
Bus:		Bus ID	Type
		 0	 PCI
		 1	 PCI
		 2	 PCI
		 3	 PCI   
		 4	 PCI
		 5	 ISA
--
I/O APICs:	APIC ID	Version	State		Address
		 4	 0x11	 usable		 0xfec00000
--
I/O Ints:	Type	Polarity    Trigger	Bus ID	 IRQ	APIC ID	PIN#
		INT	active-lo       level	     0	31:B	      4	  17
		INT	active-lo       level	     0	31:D	      4	  19
		INT	active-lo       level	     0	31:C	      4	  23
		INT	active-lo       level	     4	 7:A	      4	  16
		INT	active-lo       level	     4	 1:A	      4	  17
		INT	active-lo       level	     1	 0:A	      4	  22
		INT	active-lo       level	     4	 4:A	      4	  16
		INT	active-lo       level	     0	31:A	      4	  16
		ExtINT	 conforms    conforms	     5	   0	      4	   0
		INT	 conforms    conforms	     5	   1	      4	   1
		INT	 conforms    conforms	     5	   0	      4	   2
		INT	 conforms    conforms	     5	   3	      4	   3
		INT	 conforms    conforms	     5	   4	      4	   4
		INT	 conforms    conforms	     5	   6	      4	   6
		INT	 conforms    conforms	     5	   7	      4	   7
		INT	active-hi        edge	     5	   8	      4	   8
		INT	 conforms    conforms	     5	  12	      4	  12
		INT	 conforms    conforms	     5	  13	      4	  13
		INT	 conforms    conforms	     5	  14	      4	  14
		INT	 conforms    conforms	     5	  15	      4	  15
--
Local Ints:	Type	Polarity    Trigger	Bus ID	 IRQ	APIC ID	PIN#
		ExtINT	 conforms    conforms	     0	 0:A	    255	   0
		NMI	 conforms    conforms	     0	 0:A	    255	   1

===============================================================================
Received on Tue Jun 10 2003 - 15:29:14 UTC

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