On Thu, 17 Jun 2004, Don Bowman wrote: > > in the intel instruction manual, the effect > of STI is that interrupts are enabled > *after* the next instruction. > > ie: > > sti > ret > ... > > the return is still run with interrupts disabled > (if they were prior to the STI). > > In acpi_cpu_idle_c1, it does: > > sti > hlt > > shouldn't there be a NOP in there so that interrupts > are guaranteed on? I think your reading of it is right.. but I also think that if it was ALWAYS right we'd see processors go idle and never wake up again.... Since this doesn't seem to happen, maybe ther eis a bug in the emulator? We can always add a nop I guess and see what happens.. > > We have traced down a lockup of the system with > a TAP emulator, and found that three processors > are in acpi_cpu_idle with bit 9 of EFLAGS clear, > indicating interrupts are disabled. The fourth > processor is spinning with nothing to do (since > hardclock etc don't come to it). > > Suggestions? Am i off base on the sti/hlt? Is > there another problem that i might be running into? > > --don > _______________________________________________ > freebsd-current_at_freebsd.org mailing list > http://lists.freebsd.org/mailman/listinfo/freebsd-current > To unsubscribe, send any mail to "freebsd-current-unsubscribe_at_freebsd.org" >Received on Thu Jun 17 2004 - 17:39:25 UTC
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