RE: STI, HLT in acpi_cpu_idle_c1

From: Gerrit Nagelhout <gnagelhout_at_sandvine.com>
Date: Mon, 28 Jun 2004 09:53:51 -0400
John Baldwin wrote:
> Hmm, it appears it is consistently CPU1 that thinks that 
> IPI_HARDCLOCK is not 
> being EOI'd.  Can you try swapping the CPUs and see if the 
> lockup moves from 
> CPU1 to CPU3?
> 
> -- 

I added the following *HACK* to the idle code, and let it run
over the weekend (with halt on idle disabled).  It hit the function
isr_problem 9 times, but did not lockup anymore.  The problem
is that I don't know if the EOI just got lost, or whether the
interrupt was not handled at all.  I couldn't find any ill effects
from this code ... yet.

extern volatile lapic_t *lapic;
void isr_problem(void);
int isrProblem=0;
void isr_problem()
{
    isrProblem++;
    lapic->eoi = 0;
}

int
mp_grab_cpu_hlt(void)
{
	u_int mask = PCPU_GET(cpumask);
	int retval;

        if(lapic->isr7 != 0) {
            isr_problem();
        }

	retval = mask & hlt_cpus_mask;
	while (mask & hlt_cpus_mask)
		__asm __volatile("sti; hlt" : : : "memory");
	return (retval);
}
Received on Mon Jun 28 2004 - 11:54:23 UTC

This archive was generated by hypermail 2.4.0 : Wed May 19 2021 - 11:37:59 UTC