Re: Sio & Puc memory mapped

Marcel Moolenaar wrote:

>On Fri, May 14, 2004 at 07:16:27PM +0400, Roman Kurakin wrote:
>
>*snip*
>  
>
>>I don't have any other cards supported by uart(4), so I can't test
>>it by my self. If you have a time and ability, I'll send these tests
>>for you.
>>    
>>
>Love to. I can take a look at it this weekend. If the tests aren't
>self-explanatory, could you add a small note about what they are
>supposed to test and if not obvious, what their expected outcome is?
>  
>
If you get an error or test freeze this would be bad.
The only problem that could be - "break test" should fail.
Other tests should pass.

I doesn't use break test, so I put off to find out why this part
is broken.

Usage:
        aiotest [-spmfb] device1 device2
Options:
        -s      speed test
        -p      parity test
        -m      pmodem signals test
        -f      flow control test
        -b      break test

This test tests two ports. You need a full null-mode cable for it.

Usage:
        asytest [-b baud] [-p pattern] device...
Options:
        -b #    data rate, default 115200 bits/sec
        -p [12] pattern, default 1
                 1 0xAA/0x55
                 2 random

This is single port test. You need a loop for it. You may run two tests
for two connected to each other ports, but in that case I would unable
to use random pattern. On linux 2.6 serial driver test with constant
pattern works almost fine, but with random shows how it is buggy.

rik