Re: Loss of ed(4) in a RC1 booted in qemu

In message: <200510132251.00632.thierry_at_herbelot.com>
            Thierry Herbelot <thierry_at_herbelot.com> writes:
: Le Thursday 13 October 2005 21:58, M. Warner Losh a écrit :
: >
: > I'll be fixing this in the next day or three and it will be MFC'd from
: > head into RC2 when that happens.  I'm not sure where the snapshots
: > are, but there's a patch floating around to get around the qemu issue
: > just posted if you can't wait.  I plan on trying it now with RC1.  I
: > also plan on looking into the ne2000.c emulation to see why things are
: > failing (eg, is it a flaw in the RTL8029 emulation, or a flaw in if_ed
: > somewhere).
: 
: Great ! I'll try the patch ASAP

I've committed changes to -current to work on patched and unpatched
versions of qemu.  Here's my patches to qemu to implement the RTL8029
specific registers.  Place them in files/patch-hw::ne2000.c of the
emulators/qemu port.

Warner

--- hw/ne2000.c~	Thu Oct 13 16:33:39 2005
+++ hw/ne2000.c	Thu Oct 13 16:33:47 2005
_at__at_ -47,7 +47,9 _at__at_
 #define EN0_CRDAHI	0x09	/* high byte, current remote dma address RD */
 #define EN0_RSARHI	0x09	/* Remote start address reg 1 */
 #define EN0_RCNTLO	0x0a	/* Remote byte count reg WR */
+#define EN0_RTL8029ID0	0x0a	/* Realtek ID byte #1 RD */
 #define EN0_RCNTHI	0x0b	/* Remote byte count reg WR */
+#define EN0_RTL8029ID1	0x0b	/* Realtek ID byte #2 RD */
 #define EN0_RSR		0x0c	/* rx status reg RD */
 #define EN0_RXCR	0x0c	/* RX configuration reg WR */
 #define EN0_TXCR	0x0d	/* TX configuration reg WR */
_at__at_ -64,6 +66,11 _at__at_
 #define EN2_STARTPG	0x21	/* Starting page of ring bfr RD */
 #define EN2_STOPPG	0x22	/* Ending page +1 of ring bfr RD */
 
+#define EN3_CONFIG0	0x33
+#define EN3_CONFIG1	0x34
+#define EN3_CONFIG2	0x35
+#define EN3_CONFIG3	0x36
+
 /*  Register accessed at EN_CMD, the 8390 base addr.  */
 #define E8390_STOP	0x01	/* Stop and reset the chip */
 #define E8390_START	0x02	/* Start the chip, clear reset */
_at__at_ -385,6 +392,21 _at__at_
         case EN2_STOPPG:
             ret = s->stop >> 8;
             break;
+	case EN0_RTL8029ID0:
+	    ret = 0x50;
+	    break;
+	case EN0_RTL8029ID1:
+	    ret = 0x43;
+	    break;
+	case EN3_CONFIG0:
+	    ret = 0;		/* 10baseT media */
+	    break;
+	case EN3_CONFIG2:
+	    ret = 0x40;		/* 10baseT active */
+	    break;
+	case EN3_CONFIG3:
+	    ret = 0x40;		/* Full duplex */
+	    break;
         default:
             ret = 0x00;
             break;