> > One approach that we could use for 64-bit counters would be to just > > use 32-bits one, and poll them for overflow and bump an overflow > > count. This assumes that the 32-bit counters overflow much less often > > than the polling interval, and easily triples the amount of storage > > for each of them... It is ugly :-( > > > > What's wrong with the add+adc (asm) approach found on any i386? Presumably the fact that add + adc isn't an atomic operation. So if you want to guarantee 64 bit consistency, you need locking or similar. Steinar Haug, Nethelp consulting, sthaug_at_nethelp.noReceived on Sun Jul 23 2006 - 16:58:05 UTC
This archive was generated by hypermail 2.4.0 : Wed May 19 2021 - 11:38:58 UTC