Oliver Fromme <olli_at_lurza.secnetix.de> writes: > Using cmpxchg8b with a lock prefix wouldn't be a good idea anyway. > If I remember correctly, the lock cmpxchg8b combination was the > cause of the infamous "F00F" bug of old Pentium processors. It > causes them to freeze. Only when the operand is invalid. This causes an invalid opcode exception which can not be handled because the memory bus is locked, preventing the handler from beig loaded into cache. > (FreeBSD has a hack to work around the problem, as you certainly > know ... I don't know exactly how it works.) By marking the interrupt descriptor table read-only, the invalid opcode exception triggers a page fault, which unlocks the bus. The page fault handler examines the state of the CPU, determine that an invalid opcode exception occurred, and passes control to the appropriate handler (which sends SIGILL to the offending process). Additionally, to avoid penalizing other exceptions, the IDT is aligned such that it crosses a page boundary immediately after the entry for the invalid opcode exception, so only the first six entries in the IDT needs to be read-only. DES -- Dag-Erling Smørgrav - des_at_des.noReceived on Fri Apr 13 2007 - 14:16:47 UTC
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