Re: TSC Timecounter and multi-core/SMP

In message <47FE7E0C.4070801_at_FreeBSD.org>, Maxim Sobolev writes:
>Kris Kennaway wrote:
>> gnn_at_freebsd.org wrote:
>>> Howdy,
>>>
>>> Is the TSC timecounter synchronized across multiple cores and/or
>>> processors?  A quick search seems to indicate it's not but I'd like to
>>> find a definitive reference on the TSC.
>> 
>> Modern Intel systems tend to be synchronized, in my experience.
>
>I really doubt they are. As far as I know newest milti-core chips can 
>modulate frequency of even suspend individual cores independently of 
>each other, which would make such synchronization difficult to maintain 
>if the power management is on.

P4 (and I think most newer chips) have a TSC that runs independent
of the cpu clock frequency, and supposedly, always at constant rate.

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