Re: [CFT] alc(4) QAC AR816x/AR817x ethernet controller support

On Sat, Oct 04, 2014 at 08:10:06PM +0000, Craig Wiesen wrote:
> Yonghyeon PYUN <pyunyh <at> gmail.com> writes:
> 
> > 
> > On Wed, Oct 01, 2014 at 10:36:37AM +0900, Yonghyeon PYUN wrote:
> > > On Tue, Sep 30, 2014 at 10:57:41AM +0900, Yonghyeon PYUN wrote:
> > > > Hi,
> > > > I've added support for QAC AR816x/AR817x ethernet controllers.  It
> > > > passed my limited testing and I need more testers.  You can find
> > > > patches from the following URLs.
> > > > 
> > > > http://people.freebsd.org/~yongari/alc/pci.quirk.diff
> > > > and
> > > > http://people.freebsd.org/~yongari/alc/alc.diff.20140930
> > > > 
> > > > pci.qurik.diff is to workaround silicon bug of AR816x. Without it
> > > > MSI/MSIX interrupt wouldn't work.  If you just want to use
> > > > legacy INTx interrupt you don't have to apply it but you have to
> > > > tell alc(4) not to use MSI/MSIX interrupt with tunables(
> > > > hw.alc.msi.disable and hw.alc.msix_disable).
> > > > 
> > > > alc.diff.20140930 will add support for AR8161/AR8162/AR8171/AR8172
> > > > and E2200 controllers.  It supports all hardware features except
> > > > RSS.  If you have any QAC AR816x/AR817x or old AR813x/AR815x
> > > > controllers please test and report how the diff works for you.
> > > > Thanks.
> > > 
> > > http://people.freebsd.org/~yongari/alc/pci.quirk.diff
> > > http://people.freebsd.org/~yongari/alc/alc.diff.20141001
> > > 
> > > Patch updated to address link establishment issue.
> > 
> > http://people.freebsd.org/~yongari/alc/alc.diff.20141002
> > Patch updated again to correct wrong lock assertion.
> > _______________________________________________
> 
> 
> 
> Hi-
> 
> 
> I can add that I tested your patches on a 9.3 Stable machine.
> The motherboard is a GA-Z77-D3H (rev. 1.1) with onboard Atheros AR816x.
> I did have to apply one of the patch hunks by hand, see below.
> I am able to ssh into the machine, and remotely access apache/poudriere.
> I have not seen any problems so far.
> I've included a few outputs for you to examine.
> 

Thanks for your testing!

[...]

> 
> Rejected hunk:
> # cat if_alc.c.rej

This was caused by not MFCing r240693.  I'll see whether it could
be merged to stable/9.

> ***************
> *** 831,843 ****
>   			CSR_WRITE_4(sc, ALC_PCIE_PHYMISC2, val);
>   		}
>   		/* Disable ASPM L0S and L1. */
> - 		cap = CSR_READ_2(sc, base + PCIER_LINK_CAP);
>   		if ((cap & PCIEM_LINK_CAP_ASPM) != 0) {
> - 			ctl = CSR_READ_2(sc, base + PCIER_LINK_CTL);
>   			if ((ctl & PCIEM_LINK_CTL_RCB) != 0)
>   				sc->alc_rcb = DMA_CFG_RCB_128;
>   			if (bootverbose)
> - 				device_printf(dev, "RCB %u bytes\n",
>   				    sc->alc_rcb == DMA_CFG_RCB_64 ? 64 : 
> 128);
>   			state = ctl & PCIEM_LINK_CTL_ASPMC;
>   			if (state & PCIEM_LINK_CTL_ASPMC_L0S)
> --- 1279,1291 ----
>   			CSR_WRITE_4(sc, ALC_PCIE_PHYMISC2, val);
>   		}
>   		/* Disable ASPM L0S and L1. */
> + 		cap = CSR_READ_2(sc, sc->alc_expcap + PCIER_LINK_CAP);
>   		if ((cap & PCIEM_LINK_CAP_ASPM) != 0) {
> + 			ctl = CSR_READ_2(sc, sc->alc_expcap + 
> PCIER_LINK_CTL);
>   			if ((ctl & PCIEM_LINK_CTL_RCB) != 0)
>   				sc->alc_rcb = DMA_CFG_RCB_128;
>   			if (bootverbose)
> + 				device_printf(sc->alc_dev, "RCB %u 
> bytes\n",
>   				    sc->alc_rcb == DMA_CFG_RCB_64 ? 64 : 
> 128);
>   			state = ctl & PCIEM_LINK_CTL_ASPMC;
>   			if (state & PCIEM_LINK_CTL_ASPMC_L0S)
> 
>