Re: CPUTYPE=p4 & kernel config

On Tue, 13 Jul 2004 10:59:00 -0400 (EDT)
Andre Guibert de Bruet <andy_at_siliconlandmark.com> wrote:

> 
> On Tue, 13 Jul 2004, Johan Pettersson wrote:
> 
> > On Mon, 12 Jul 2004 22:17:56 -0400 (EDT)
> > Andre Guibert de Bruet <andy_at_siliconlandmark.com> wrote:
> >
> >> On Mon, 12 Jul 2004, Ilker OZUPAK wrote:
> >>
> >>> is there any kernel options that is mandatory for the
> >>> "CPUTYPE=p4" case. anything to be addded to GENERIC
> >>> or to not to be removed.
> >>
> >> Your CPU qualifies for the I686_CPU cpu directive. You may consider
> >> commenting out I{4,5}86_CPU if you are not concerned with having
> >the> kernel boot on older machines. You may also want to add "options
> >> CPU_ENABLE_SSE".
> >
> > 'CPU_ENABLE_SSE' is automatically enabled when the kernel is
> > compiled with 'cpu I686_CPU'.
> 
> Pentium Pros, IIs, Xeon IIs and early Celerons are 686s but they do
> not support SSE (SIMD was introduced with the PIII, IIRC). Are you
> positive that SSE floating-point calculations are enabled with
> I686_CPU?
> 
> Here's what the cpu features bitfield expands to on an older 686:
> Features=0x183fbff<FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,P
> GE,MCA,CMOV,PAT,PSE36,MMX,FXSR>
> 
> Compare this to the following, which was taken from a newer 686:
> Features=0x383fbff<FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,P
> GE,MCA,CMOV,PAT,PSE36,MMX,FXSR,SSE>
> 
> Regards,
> 
> > Andre Guibert de Bruet | Enterprise Software Consultant >
> > Silicon Landmark, LLC. | http://siliconlandmark.com/    >

>From src/sys/i386/NOTES:

# CPU_ENABLE_SSE enables SSE/MMX2 instructions support.  This is default
# on I686_CPU and above.